1. Field of the Invention.
The invention relates generally to the field of MOS integrated circuit microcontrollers and more specifically to the system bus of such microcontrollers used for transferring data between the microcontroller and an external memory.
2. Description of the Prior Art
Semiconductor microcontroller chips generally incorporate a certain amount of program and/or data memory on-chip. For various reasons such as prototyping, large memory requirements, program updates, etc., microcontrollers also need to access external memory devices. Such access is usually done over a multiplexed address/data system bus under the control of a few dedicated control signals carrying information such as when the address is valid, whether the access is a read or a write access, and whether a read access is for code or data.
A microcontroller family has a long commercial life. Over time the implementation choices made at the time of the initial design for the system bus timings may not permit the system bus to interconnect efficiently with memory devices as the technology evolves. For example, a microcontroller may initially be designed to operate with a 10 MHz system clock with system bus timings that allow compatibility with a variety of commercially available memories. Compatibility of a memory with the microcontroller is determined by a given memory's ability to meet the microcontroller's system bus timing specifications. Over time the manufacturing technology advances allowing the same microcontroller design manufactured using modern manufacturing technology to operate with a 20 MHz system clock. However, at the 20 MHz operating frequency the system bus timing specifications are greatly reduced. Even today's fastest, most expensive EPROM memories are not capable of reliably exchanging data with the microcontroller using the originally defined system bus timings. This is a serious limitation on the marketability of an older microcontroller design as it matures with advancing technology.
After choosing a microcontroller design, commercial users of microcontrollers invest a significant amount of time and money in developing hardware and software that are compatible with the chosen microcontroller. Because of the large investment involved in choosing a new microcontroller design, commercial users prefer to continue using a previously selected microcontroller design unless newer microcontroller designs provide a significant advantage such as a substantial increase in performance or a substantial decrease in overall system cost. Newer microcontrollers are designed with system bus timings that allow them to operate at their highest operating frequency when transferring data to and from external memory. Therefore, mature microcontrollers having system bus timings that prevent full frequency operation must compete in the marketplace against newer microcontrollers having system bus timings that provide the increased performance of full frequency external operation. To allow mature microcontrollers to compete in system bus access performance with newer microcontrollers, there is a long felt need for providing a means for upgrading the system bus timings of a mature microcontroller. Providing upgraded system bus timings allows a mature microcontroller to operate at the highest frequency allowed by current manufacturing technologies, thereby making the system bus access performance of mature microcontrollers competitive with that of newer microcontrollers. It is important that such an upgrade not require users to make additional hardware and software investments. It is also important that the implementation of the upgraded system bus timings not require a complete redesign or excessive amounts of additional logic.
It is appreciated then that what is needed is a means for improving the system bus timings of a mature microcontroller such that it can operate at frequencies higher than those defined in the original design while accessing external memory. It is also appreciated that providing a variety of upgraded system bus timing modes will provide greater flexibility in choosing which external memory devices to use with the upgraded microcontroller.